The present invention relates to semiconductor devices and more particularly to technology useful for a semiconductor device having an SRAM disposed over an SOI substrate.
Japanese Unexamined Patent Application Publication No. 2009-135140 discloses a semiconductor device which includes PMOS and NMOS transistors with a thin-film BOX-SOI structure. The semiconductor device has a semiconductor support substrate, an insulating film with a thickness of 10 nm or less, and a semiconductor layer, in which a PMOS transistor and an NMOS transistor are formed in a surface of the semiconductor layer. A well region lies under the semiconductor layer through the insulating film with a thickness of 10 nm or less and thresholds for the PMOS and NMOS transistors are changed by applying a desired voltage to the well region.